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Fully active frequency compensation analysis on multi-stages CMOS amplifier
An enhanced three-stage CMOS transconductance amplifier attached to a novel frequency compensation network is proposed. Two differential stages are attached with Miller capacitors and the Miller effect is boosted accordingly. In this way, four negative loops intensify the Miller effect virtually. The structure is designed at the transistor level using 0.18 μm CMOS library and the SPICE simulator while a symbolical transfer function is extracted and analyzed to obtain circuit dynamics. Leveraging both concept and method, the proposed amplifier shows unconditional stability with acceptable accuracy regarding the symbolic description and simulation results. Ample sensitivity analysis is also provided to show the reliability of the amplifier. By simulation responses, the presented circuit expresses competitive merits against previous works. Simulation results show 120 dB as DC gain, 18 MHz as, GBW, and 54º as phase margin while the simulated amplifier consumes only 345μW.
Fully active frequency compensation analysis on multi-stages CMOS amplifier
An enhanced three-stage CMOS transconductance amplifier attached to a novel frequency compensation network is proposed. Two differential stages are attached with Miller capacitors and the Miller effect is boosted accordingly. In this way, four negative loops intensify the Miller effect virtually. The structure is designed at the transistor level using 0.18 μm CMOS library and the SPICE simulator while a symbolical transfer function is extracted and analyzed to obtain circuit dynamics. Leveraging both concept and method, the proposed amplifier shows unconditional stability with acceptable accuracy regarding the symbolic description and simulation results. Ample sensitivity analysis is also provided to show the reliability of the amplifier. By simulation responses, the presented circuit expresses competitive merits against previous works. Simulation results show 120 dB as DC gain, 18 MHz as, GBW, and 54º as phase margin while the simulated amplifier consumes only 345μW.
Fully active frequency compensation analysis on multi-stages CMOS amplifier
Ilghar Rezaei (Autor:in) / Amir Ali Mohammad Khani (Autor:in) / Morteza Dadgar (Autor:in) / Mahdis Attar (Autor:in)
2023
Aufsatz (Zeitschrift)
Elektronische Ressource
Unbekannt
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