Voltage-Controlled Oscillator Design Using MOS Varactor: Fid-Bau Portal

Voltage-Controlled Oscillator Design Using MOS Varactor

Kumar, Manoj

Abstract In this work, voltage-controlled ring oscillator (VCO) by employing the three transistors (3T) XOR gates and NMOS varactor load has been reported. Output load has been varied with the application of reverse body bias voltage of NMOS transistor. VCO circuits with 3 and 5 delay stages have been designed. The output frequency is controlled by coarse and fine tuning techniques. The coarse tuning is provided with the variation in supply voltage (V CT) in the range of 1.8 V to 3.3 V. Further, fine tuning has been obtained with variation in reverse substrate bias voltage of NMOS varactor load from 0 to − 1 V. A three-stage VCO design shows output frequency deviation from 340.136 to 628.930 MHz and power consumption ranges from 0.1658 to 1.1285 mW with coarse tuning technique. Frequency deviation from 340.136 to 333.344 MHz and power consumption deviation from 0.1658 to 0.1648 mW have been obtained with fine tuning in three-stage VCO with fixed V CT of 1.8 V. A five-stage VCO design provides the output frequency from 189.035 to 328.947 MHz with power consumption range varying from 0.1698 mW to 1.1364 mW in coarse tuning mode. Moreover, five-stage VCO with fine tuning shows frequency variations from 328.947 to 326.797 MHz with varied power from 1.1364 to 1.1350 mW having the fixed V CT of 3.3 V. Results have been achieved with SPICE in 0.35-µm CMOS technology. An assessment of proposed VCO with previously reported circuits shows improvements in terms of output frequency range and power consumption.