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    Parallel Architecture for Universal Digital Signal Processing

    New search for: Jain, V. K.
    New search for: Hikawa, H.
    New search for: University of Hawaii
    New search for: IEEE; Computer Society
    New search for: ACM

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    Parallel Architecture for Universal Digital Signal Processing

    New search for: Jain, V. K.
    New search for: Hikawa, H.
    New search for: University of Hawaii
    New search for: IEEE; Computer Society
    New search for: ACM

    Access

    Access via TIB
    Check availability in my library
    Order at Subito €

    Parallel Architecture for Universal Digital Signal Processing

    New search for: Jain, V. K.
    New search for: Hikawa, H.
    New search for: University of Hawaii
    New search for: IEEE; Computer Society
    New search for: ACM

    Access

    Access via TIB
    Check availability in my library
    Order at Subito €

    Access

    Access via TIB
    Check availability in my library
    Order at Subito €

    Page navigation

    Document information
    Similar titles

    Export, share and cite

    Document information
    Title:

    Parallel Architecture for Universal Digital Signal Processing

    Contributors:

    Jain, V. K. (author) / Hikawa, H. (author) / University of Hawaii / IEEE; Computer Society / ACM

    Conference:

    27th Hawaii international conference, Vol 1; Architecture ; 1994 ; Wailea; HI

    Published in:

    Vol 1; Architecture ; 114-123

    PROCEEDINGS OF THE HAWAII INTERNATIONAL CONFERENCE ON SYSTEM SCIENCES ; 27//v1

    Publication date:

    1994-01-01

    Size:

    10 pages

    Remarks:

    In 5 vols; Also known as HICSS-27. IEEE cat no 94TH0607-2

    ISBN:

    0818650508

    ISSN:

    1060-3425

    Type of media:

    Conference paper

    Type of material:

    Print

    Language:

    English

    Keywords:

    system sciences , HICSS , ACM , IEEE

    © Metadata Copyright the British Library Board and other contributors. All rights reserved.

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