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Near-Threshold Flip-Flops Using Clocked Adiabatic Logic in Nanometer CMOS Processes

Ni, H.Y. / Hu, J.P.

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Near-Threshold Flip-Flops Using Clocked Adiabatic Logic in Nanometer CMOS Processes

Ni, H.Y. / Hu, J.P.

Near-Threshold Flip-Flops Using Clocked Adiabatic Logic in Nanometer CMOS Processes

Ni, H.Y. / Hu, J.P.

Access

Access via TIB

Check availability in my library

Order at Subito €

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Document information

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Document information

Title:

Near-Threshold Flip-Flops Using Clocked Adiabatic Logic in Nanometer CMOS Processes

Contributors:

Ni, H.Y. (author) / Hu, J.P. (author) / Wu, Y.

Published in:

Components, Packaging and Manufacturing Technology ; 837-842

KEY ENGINEERING MATERIALS ; 460/461

Publication date:

2011-01-01

Size:

6 pages

ISSN:

1013-9826

Type of media:

Article (Journal)

Type of material:

Language:

English

Classification:

DDC: 620.11

Li, H. / Zhang, Y. / Hu, J.P. | British Library Online Contents | 2011

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