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A platform for research: civil engineering, architecture and urbanism
Lock state monitoring circuit, electronic lock and lock state monitoring and control method
The lock state monitoring circuit comprises a main control chip, a wiring terminal, a first resistor, a second resistor, a third resistor, a fourth resistor and a fifth resistor, wherein the wiring terminal comprises a first pin, a second pin, a third pin, a fourth pin, a fifth pin and a sixth pin; the first resistor, the second resistor, the third resistor and the fourth resistor are connected in sequence and grounded; the fifth resistor is connected with a first power supply; the first pin, the second pin and the third pin are respectively connected to one grounded end of the first resistor, the joint of the first resistor and the second resistor and the joint of the second resistor and the third resistor, and the fourth pin and the fifth pin are both connected to the joint of the third resistor and the fourth resistor. An ADC pin and a sixth pin of the main control chip are connected to the joint of the fourth resistor and the fifth resistor; the resistance values of the second resistor and the fourth resistor are not equal, and the resistance values of the first resistor and the third resistor are not equal. The invention further provides an electronic lock applying the lock state monitoring circuit and a lock state monitoring and control method based on the electronic lock.
本申请公开一种锁状态监测电路，其包括主控芯片、包含第一引脚、第二引脚、第三引脚、第四引脚、第五引脚和第六引脚的接线端子以及依次连接的接地的第一电阻、第二电阻、第三电阻、第四电阻和连接第一电源的第五电阻；第一引脚、所述第二引脚和第三引脚分别连接至第一电阻的接地的一端、第一电阻和第二电阻的连接处以及第二电阻和第三电阻的连接处，第四引脚和第五引脚均连接至第三电阻和第四电阻的连接处，主控芯片的ADC引脚和第六引脚均连接至第四电阻和第五电阻的连接处；第二电阻和第四电阻的阻值不相等且第一电阻和第三电阻的阻值不相等。本申请还提供一种应用锁状态监测电路的电子锁以及基于电子锁的锁状态监测及控制方法。
Lock state monitoring circuit, electronic lock and lock state monitoring and control method
The lock state monitoring circuit comprises a main control chip, a wiring terminal, a first resistor, a second resistor, a third resistor, a fourth resistor and a fifth resistor, wherein the wiring terminal comprises a first pin, a second pin, a third pin, a fourth pin, a fifth pin and a sixth pin; the first resistor, the second resistor, the third resistor and the fourth resistor are connected in sequence and grounded; the fifth resistor is connected with a first power supply; the first pin, the second pin and the third pin are respectively connected to one grounded end of the first resistor, the joint of the first resistor and the second resistor and the joint of the second resistor and the third resistor, and the fourth pin and the fifth pin are both connected to the joint of the third resistor and the fourth resistor. An ADC pin and a sixth pin of the main control chip are connected to the joint of the fourth resistor and the fifth resistor; the resistance values of the second resistor and the fourth resistor are not equal, and the resistance values of the first resistor and the third resistor are not equal. The invention further provides an electronic lock applying the lock state monitoring circuit and a lock state monitoring and control method based on the electronic lock.
本申请公开一种锁状态监测电路，其包括主控芯片、包含第一引脚、第二引脚、第三引脚、第四引脚、第五引脚和第六引脚的接线端子以及依次连接的接地的第一电阻、第二电阻、第三电阻、第四电阻和连接第一电源的第五电阻；第一引脚、所述第二引脚和第三引脚分别连接至第一电阻的接地的一端、第一电阻和第二电阻的连接处以及第二电阻和第三电阻的连接处，第四引脚和第五引脚均连接至第三电阻和第四电阻的连接处，主控芯片的ADC引脚和第六引脚均连接至第四电阻和第五电阻的连接处；第二电阻和第四电阻的阻值不相等且第一电阻和第三电阻的阻值不相等。本申请还提供一种应用锁状态监测电路的电子锁以及基于电子锁的锁状态监测及控制方法。
Lock state monitoring circuit, electronic lock and lock state monitoring and control method
锁状态监测电路、电子锁以及锁状态监测及控制方法
XIE XIANGGU (author) / LAI FANGXI (author) / CHEN SHUAI (author) / ZHOU MIN (author) / LUO FUZHANG (author)
2023-11-17
Patent
Electronic Resource
Chinese
IPC:
E05B
LOCKS
,
Schlösser
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