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PATTERN DETECTION
The present disclosure there is provided a pattern detection unit (300; 400) comprising a shift register (302; 402) configured to over-sample a multi-bit input signal such that each bit of the input signal is represented by a plurality of samples in the shift register (302; 402); and a correlator (304; 404) configured to compare a target pattern with two or more of the plurality of samples of each bit from the shift register (302; 402) in order to determine whether or not the input signal matches the target pattern.
PATTERN DETECTION
The present disclosure there is provided a pattern detection unit (300; 400) comprising a shift register (302; 402) configured to over-sample a multi-bit input signal such that each bit of the input signal is represented by a plurality of samples in the shift register (302; 402); and a correlator (304; 404) configured to compare a target pattern with two or more of the plurality of samples of each bit from the shift register (302; 402) in order to determine whether or not the input signal matches the target pattern.
PATTERN DETECTION
POSCH MARTIN (author) / PERISSAKIS STYLIANOS (author)
2018-02-01
Patent
Electronic Resource
English
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