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A Review of the Digital Implementation of Continuous-Time Fractional-Order Chaotic Systems Using FPGAs and Embedded Hardware
https://orcid.org/0000-0002-9106-6982
Abstract The hallmark of fractional-order derivatives is a memory kernel to describe real-world phenomena with a better approximation than classical calculus. In fractional-order chaotic systems, the memory kernel improves their complexity, ergodicity, and hidden dynamical behaviors, which become an excellent option to boost applications in data encryption, IoT security, random number generators, and neural networks. From an engineering point of view, the challenge consists of getting feasible electronic implementations of fractional-order chaotic systems on FPGAs and embedded hardware. However, successful implementation requires suitable numerical methods to reduce computational cost and hardware resources while the memory kernel length preserves a relatively large amount of data. This article comprehensively reviews the FPGA-based and embedded physical realization of fractional-order continuous-time chaotic systems under singular kernel fractional derivatives. In particular, the main numerical algorithms for computing a solution of the fractional-order continuous-time chaotic systems are in-depth studied to evidence their computational cost (simulations time, memory data storage, hardware resources, and accuracy) when implemented on digital hardware. We also analyze and demonstrate two methodologies for obtaining suitable digital implementations using FPGAs and embedded hardware by considering the fixed- and floating-point digital arithmetic representation, hardware architecture, programming languages, and power consumption and resources performance. Finally, we discuss the existing open problems in both computational and hardware and forecast the research opportunities in this exciting scientific area.
A Review of the Digital Implementation of Continuous-Time Fractional-Order Chaotic Systems Using FPGAs and Embedded Hardware
https://orcid.org/0000-0002-9106-6982
Abstract The hallmark of fractional-order derivatives is a memory kernel to describe real-world phenomena with a better approximation than classical calculus. In fractional-order chaotic systems, the memory kernel improves their complexity, ergodicity, and hidden dynamical behaviors, which become an excellent option to boost applications in data encryption, IoT security, random number generators, and neural networks. From an engineering point of view, the challenge consists of getting feasible electronic implementations of fractional-order chaotic systems on FPGAs and embedded hardware. However, successful implementation requires suitable numerical methods to reduce computational cost and hardware resources while the memory kernel length preserves a relatively large amount of data. This article comprehensively reviews the FPGA-based and embedded physical realization of fractional-order continuous-time chaotic systems under singular kernel fractional derivatives. In particular, the main numerical algorithms for computing a solution of the fractional-order continuous-time chaotic systems are in-depth studied to evidence their computational cost (simulations time, memory data storage, hardware resources, and accuracy) when implemented on digital hardware. We also analyze and demonstrate two methodologies for obtaining suitable digital implementations using FPGAs and embedded hardware by considering the fixed- and floating-point digital arithmetic representation, hardware architecture, programming languages, and power consumption and resources performance. Finally, we discuss the existing open problems in both computational and hardware and forecast the research opportunities in this exciting scientific area.
A Review of the Digital Implementation of Continuous-Time Fractional-Order Chaotic Systems Using FPGAs and Embedded Hardware
https://orcid.org/0000-0002-9106-6982
Abstract The hallmark of fractional-order derivatives is a memory kernel to describe real-world phenomena with a better approximation than classical calculus. In fractional-order chaotic systems, the memory kernel improves their complexity, ergodicity, and hidden dynamical behaviors, which become an excellent option to boost applications in data encryption, IoT security, random number generators, and neural networks. From an engineering point of view, the challenge consists of getting feasible electronic implementations of fractional-order chaotic systems on FPGAs and embedded hardware. However, successful implementation requires suitable numerical methods to reduce computational cost and hardware resources while the memory kernel length preserves a relatively large amount of data. This article comprehensively reviews the FPGA-based and embedded physical realization of fractional-order continuous-time chaotic systems under singular kernel fractional derivatives. In particular, the main numerical algorithms for computing a solution of the fractional-order continuous-time chaotic systems are in-depth studied to evidence their computational cost (simulations time, memory data storage, hardware resources, and accuracy) when implemented on digital hardware. We also analyze and demonstrate two methodologies for obtaining suitable digital implementations using FPGAs and embedded hardware by considering the fixed- and floating-point digital arithmetic representation, hardware architecture, programming languages, and power consumption and resources performance. Finally, we discuss the existing open problems in both computational and hardware and forecast the research opportunities in this exciting scientific area.
A Review of the Digital Implementation of Continuous-Time Fractional-Order Chaotic Systems Using FPGAs and Embedded Hardware
Clemente-López, Daniel (author) / Munoz-Pacheco, Jesus M. (author) / Rangel-Magdaleno, Jose de Jesus (author)
2022
Article (Journal)
Electronic Resource
English
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