Eine Plattform für die Wissenschaft: Bauingenieurwesen, Architektur und Urbanistik
Eine Plattform für die Wissenschaft: Bauingenieurwesen, Architektur und Urbanistik
A Network Processor Architecture for Very High Speed Line Interfaces
A Network Processor Architecture for Very High Speed Line Interfaces
A Network Processor Architecture for Very High Speed Line Interfaces
Shimonishi, H. (Autor:in) / Murase, T. (Autor:in)
JOURNAL OF COMMUNICATIONS AND NETWORKS ; 3 ; 88-95
01.01.2001
8 pages
Aufsatz (Zeitschrift)
Englisch
DDC:
621.3821
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