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Development of Lapping and Polishing Technologies of 4H-SiC Wafers for Power Device Applications
Development of Lapping and Polishing Technologies of 4H-SiC Wafers for Power Device Applications
Development of Lapping and Polishing Technologies of 4H-SiC Wafers for Power Device Applications
Yoshiro, H. (Autor:in) / Fujimoto, T. (Autor:in) / Ohtani, N. (Autor:in) / Hoshino, T. (Autor:in) / Katsuno, M. (Autor:in) / Aigo, T. (Autor:in) / Tsuge, H. (Autor:in) / Nakabayashi, M. (Autor:in) / Hirano, H. (Autor:in) / Tatsumi, K. (Autor:in)
MATERIALS SCIENCE FORUM ; 600/603 ; 819-822
01.01.2009
4 pages
Aufsatz (Zeitschrift)
Englisch
DDC:
620.11
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