Eine Plattform für die Wissenschaft: Bauingenieurwesen, Architektur und Urbanistik
Design and System-Level Simulation of a Novel On-Chip Test Based on Macromodels
KEY ENGINEERING MATERIALS ; 483 ; 38-42
01.01.2011
5 pages
Aufsatz (Zeitschrift)
Englisch
DDC:
620.11
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