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Design Methodology and Jitter Analysis of a Delay Line for High-Accuracy On-Chip Jitter Measurements
Design Methodology and Jitter Analysis of a Delay Line for High-Accuracy On-Chip Jitter Measurements
Design Methodology and Jitter Analysis of a Delay Line for High-Accuracy On-Chip Jitter Measurements
Niitsu, K. (Autor:in) / Sakuma, K. (Autor:in) / Harigai, N. (Autor:in) / Hirabayashi, D. (Autor:in) / Takai, N. (Autor:in) / Yamaguchi, T.J. (Autor:in) / Kobayashi, H. (Autor:in) / Hosaka, S.
01.01.2014
5 pages
Aufsatz (Zeitschrift)
Englisch
DDC:
620.11
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