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Design Methodology and Jitter Analysis of a Delay Line for High-Accuracy On-Chip Jitter Measurements
Design Methodology and Jitter Analysis of a Delay Line for High-Accuracy On-Chip Jitter Measurements
Design Methodology and Jitter Analysis of a Delay Line for High-Accuracy On-Chip Jitter Measurements
Niitsu, K. (author) / Sakuma, K. (author) / Harigai, N. (author) / Hirabayashi, D. (author) / Takai, N. (author) / Yamaguchi, T.J. (author) / Kobayashi, H. (author) / Hosaka, S.
2014-01-01
5 pages
Article (Journal)
English
DDC:
620.11
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