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Analysis of Parasitic Oscillations in Commutation Cells with High Voltage Power MOSFETs
The dynamic behavior of power semiconductor devices with decreasing area-specic on resistances is more and more inf uenced by parasitic characteristics of packages and PCBs. These parasitic characteristics can increase the switching times of power semiconductors andhence reduce the efficiency of power electronic circuits. Furthermore, during commutation the reliability of circuits can be compromised by parasitic oscillations with temporarily increasing amplitudes. Optimized parasitic characteristics of packages and PCBs are thereforenecessary. This applies in particular, if fast power semiconductors are used. Using the example of a one quadrant buck converter topology with a high voltage power MOSFET and a SiC Schottky diode, in this work a methodology is developed that enables the predictionof parasitic oscillations with temporarily increasing amplitudes during commutation and the improvement of the stability of commutation cells. Thereto, suitable circuit models of the power semiconductors and the semiconductor's environment are required. Large-signal models of power MOSFETs and Schottky diodes are deduced for the relevant operating conditions. The combination of curve tracer and short circuit measurements allows the static parameterization of the MOSFET model for the regarded operating range. It is shown that the MOSFET's capacitances can be determined from dynamic measurements. Compared to capacitances measured in accordance with DIN ICE 747, the dynamic capacitances result in an improved conformity of simulations and measurements. The parasitic characteristics of the PCB and packages are modeled with coupling capacitances and effective resistances and inductances. The parameterization of the model is based on quasi-static field simulations of the 3D models of the PCB and packages. The derived behavioral models of the power semiconductors and the electrical interconnections of the PCB and packages are combined with simple models of the DC voltage link, the driver and the load circuit to the model of the buck ...
Analysis of Parasitic Oscillations in Commutation Cells with High Voltage Power MOSFETs
The dynamic behavior of power semiconductor devices with decreasing area-specic on resistances is more and more inf uenced by parasitic characteristics of packages and PCBs. These parasitic characteristics can increase the switching times of power semiconductors andhence reduce the efficiency of power electronic circuits. Furthermore, during commutation the reliability of circuits can be compromised by parasitic oscillations with temporarily increasing amplitudes. Optimized parasitic characteristics of packages and PCBs are thereforenecessary. This applies in particular, if fast power semiconductors are used. Using the example of a one quadrant buck converter topology with a high voltage power MOSFET and a SiC Schottky diode, in this work a methodology is developed that enables the predictionof parasitic oscillations with temporarily increasing amplitudes during commutation and the improvement of the stability of commutation cells. Thereto, suitable circuit models of the power semiconductors and the semiconductor's environment are required. Large-signal models of power MOSFETs and Schottky diodes are deduced for the relevant operating conditions. The combination of curve tracer and short circuit measurements allows the static parameterization of the MOSFET model for the regarded operating range. It is shown that the MOSFET's capacitances can be determined from dynamic measurements. Compared to capacitances measured in accordance with DIN ICE 747, the dynamic capacitances result in an improved conformity of simulations and measurements. The parasitic characteristics of the PCB and packages are modeled with coupling capacitances and effective resistances and inductances. The parameterization of the model is based on quasi-static field simulations of the 3D models of the PCB and packages. The derived behavioral models of the power semiconductors and the electrical interconnections of the PCB and packages are combined with simple models of the DC voltage link, the driver and the load circuit to the model of the buck ...
Analysis of Parasitic Oscillations in Commutation Cells with High Voltage Power MOSFETs
Treek, Vera van (Autor:in) / Petzoldt, Jürgen / Lutz, Josef / Reimann, Tobias
18.06.2014
Hochschulschrift
Elektronische Ressource
Englisch
optimization , commutation , Thüringer Pflichtexemplare , für Harvesting bereitgestellt , dynamic capacitance , compensation principle , stability analisys , super junction MOSFET , Doktorarbeit , thesis , ddc:620 , electrical interconnection , parasitic oscillations , Klasse A , modeling , high voltage power MOSFET
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