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Multilevel dual-channel NAND flash memories with high-speed read and verifying program
The multilevel dual channel (MLDC) NAND flash memory cell structures with asymmetrically-doped channel regions are proposed. The channel structures with a MLDC flash cell consisted of the two different doping channel regions. The technical computer aided design simulation results showed that the designed MLDC NAND flash cell provided the high-speed multilevel reading and program verifying due to the sensing of the discrete current levels utilizing the unique asymmetric channel structure.
Multilevel dual-channel NAND flash memories with high-speed read and verifying program
The multilevel dual channel (MLDC) NAND flash memory cell structures with asymmetrically-doped channel regions are proposed. The channel structures with a MLDC flash cell consisted of the two different doping channel regions. The technical computer aided design simulation results showed that the designed MLDC NAND flash cell provided the high-speed multilevel reading and program verifying due to the sensing of the discrete current levels utilizing the unique asymmetric channel structure.
Multilevel dual-channel NAND flash memories with high-speed read and verifying program
Jae-Ho Kim, (Autor:in) / Joung-Woo Lee, (Autor:in) / Kyung-Sik Mun, (Autor:in) / Tae Whan Kim, (Autor:in)
01.10.2006
555090 byte
Aufsatz (Konferenz)
Elektronische Ressource
Englisch
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