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    Optimization of gate-stack in junctionless Si-nanotube FET for analog/RF applications

    New search for: Tayal, Shubham
    New search for: Nandi, Ashutosh

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    Optimization of gate-stack in junctionless Si-nanotube FET for analog/RF applications

    New search for: Tayal, Shubham
    New search for: Nandi, Ashutosh

    Access

    Access via TIB
    Check availability in my library
    Order at Subito €

    Optimization of gate-stack in junctionless Si-nanotube FET for analog/RF applications

    New search for: Tayal, Shubham
    New search for: Nandi, Ashutosh

    Access

    Access via TIB
    Check availability in my library
    Order at Subito €

    Access

    Access via TIB
    Check availability in my library
    Order at Subito €

    Page navigation

    Document information
    Similar titles

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    Document information
    Title:

    Optimization of gate-stack in junctionless Si-nanotube FET for analog/RF applications

    Contributors:

    Tayal, Shubham (author) / Nandi, Ashutosh (author)

    Published in:

    Materials science in semiconductor processing ; 80 ; 63-67

    Publication date:

    2018-01-01

    Size:

    5 pages

    ISSN:

    1369-8001

    Type of media:

    Article (Journal)

    Type of material:

    Print

    Language:

    English

    Classification:

    DDC:  621.38152

    © Metadata Copyright the British Library Board and other contributors. All rights reserved.

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