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A platform for research: civil engineering, architecture and urbanism
III-V semiconductor nanoelectronics for post si era
Scaling limit of Si CMOS technology and advent of “Ubiquitous Network Era” seem to open up new horizon for IIIV nanoelectronics with much wider application areas than today. Here, its future challenges and key issues are discussed.
III-V semiconductor nanoelectronics for post si era
Scaling limit of Si CMOS technology and advent of “Ubiquitous Network Era” seem to open up new horizon for IIIV nanoelectronics with much wider application areas than today. Here, its future challenges and key issues are discussed.
III-V semiconductor nanoelectronics for post si era
Hasegawa, Hideki (author)
2006-10-01
344217 byte
Conference paper
Electronic Resource
English
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