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INSULATED CIRCUIT BOARD
An insulated circuit board having a ceramic substrate, a circuit layer on which a circuit pattern is formed and that is bonded to one surface of the ceramic substrate, and a metal layer bonded to the other surface of the ceramic substrate, the circuit layer has a first circuit layer that is bonded to the ceramic substrate and is made of aluminum and a second circuit layer that is bonded to the upper surface of the first circuit layer and is made of copper, the metal layer has a first metal layer that is bonded to the ceramic substrate and is made of aluminum and a second metal layer that is bonded to the upper surface of the first metal layer and is made of copper, the thicknesses of the first circuit layer and the first metal layer are each 0.2 mm or more and 0.9 mm or less and are equal to each other, the second circuit layer has a thickness of 0.65 mm or more and 2.0 mm or less, when the bonding area of the circuit layer is represented by S1, and the bonding area of the metal layer is represented by S2, the area ratio S1/S2 is 0.5 or more and 0.8 or less, and, when the thickness of the second circuit layer is represented by T1, and the thickness of the second metal layer is represented by T2, the thickness ratio T1/T2 is 1.4 or more and 3.2 or less.
INSULATED CIRCUIT BOARD
An insulated circuit board having a ceramic substrate, a circuit layer on which a circuit pattern is formed and that is bonded to one surface of the ceramic substrate, and a metal layer bonded to the other surface of the ceramic substrate, the circuit layer has a first circuit layer that is bonded to the ceramic substrate and is made of aluminum and a second circuit layer that is bonded to the upper surface of the first circuit layer and is made of copper, the metal layer has a first metal layer that is bonded to the ceramic substrate and is made of aluminum and a second metal layer that is bonded to the upper surface of the first metal layer and is made of copper, the thicknesses of the first circuit layer and the first metal layer are each 0.2 mm or more and 0.9 mm or less and are equal to each other, the second circuit layer has a thickness of 0.65 mm or more and 2.0 mm or less, when the bonding area of the circuit layer is represented by S1, and the bonding area of the metal layer is represented by S2, the area ratio S1/S2 is 0.5 or more and 0.8 or less, and, when the thickness of the second circuit layer is represented by T1, and the thickness of the second metal layer is represented by T2, the thickness ratio T1/T2 is 1.4 or more and 3.2 or less.
INSULATED CIRCUIT BOARD
ISOLIERTE LEITERPLATTE
CARTE DE CIRCUIT ISOLÉE
KITAHARA TAKESHI (Autor:in) / YUMOTO RYOHEI (Autor:in) / NAGATOMO YOSHIYUKI (Autor:in)
17.01.2024
Patent
Elektronische Ressource
Englisch
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