Eine Plattform für die Wissenschaft: Bauingenieurwesen, Architektur und Urbanistik
Eine Plattform für die Wissenschaft: Bauingenieurwesen, Architektur und Urbanistik
Fabrication of Si1-xGex alloy nanowire FETs
we have fabricated field effect transistors (FETs) by using high quality Si1-xGex alloy nanowires. To obtain stable contacts between Si1-xGex alloy nanowire and Ni/Au electrodes, we annealed the samples at 300 °C furnace with Ar atmosphere or RTA at 400 °C [4] Three different Si1-xGex alloy nanowires (x=5, 15, 30) were used for the fabrication of field effect transistors, and p-type gating effect observed from Si1xGex alloy nanowire devices. Among them, pronounced p-type transistor behavior, with on/off ratios as high as 106 observed from Si0.7Ge0.3 nanowire field effect transistor.
Fabrication of Si1-xGex alloy nanowire FETs
we have fabricated field effect transistors (FETs) by using high quality Si1-xGex alloy nanowires. To obtain stable contacts between Si1-xGex alloy nanowire and Ni/Au electrodes, we annealed the samples at 300 °C furnace with Ar atmosphere or RTA at 400 °C [4] Three different Si1-xGex alloy nanowires (x=5, 15, 30) were used for the fabrication of field effect transistors, and p-type gating effect observed from Si1xGex alloy nanowire devices. Among them, pronounced p-type transistor behavior, with on/off ratios as high as 106 observed from Si0.7Ge0.3 nanowire field effect transistor.
Fabrication of Si1-xGex alloy nanowire FETs
Eun-Kyoung Jeon, (Autor:in) / Han-Kyu Sung, (Autor:in) / Jeong-O Lee, (Autor:in) / Heon-Jin Choi, (Autor:in) / Ju-Jin Kim, (Autor:in)
01.10.2006
642014 byte
Aufsatz (Konferenz)
Elektronische Ressource
Englisch
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