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Sub-50nm gate length SOI transistor development for high performance microprocessors
Sub-50nm gate length SOI transistor development for high performance microprocessors
Sub-50nm gate length SOI transistor development for high performance microprocessors
Horstmann, M. (author) / Greenlaw, D. (author) / Feudel, T. (author) / Wei, A. (author) / Frohberg, K. (author) / Burbach, G. (author) / Gerhardt, M. (author) / Lenski, M. (author) / Stephan, R. (author) / Wieczorek, K. (author)
MATERIALS SCIENCE AND ENGINEERING B -LAUSANNE- ; 114/115 ; 3-8
2004-01-01
6 pages
Article (Journal)
English
DDC:
620.11
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