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Sub-50nm gate length SOI transistor development for high performance microprocessors
Sub-50nm gate length SOI transistor development for high performance microprocessors
Sub-50nm gate length SOI transistor development for high performance microprocessors
Horstmann, M. (Autor:in) / Greenlaw, D. (Autor:in) / Feudel, T. (Autor:in) / Wei, A. (Autor:in) / Frohberg, K. (Autor:in) / Burbach, G. (Autor:in) / Gerhardt, M. (Autor:in) / Lenski, M. (Autor:in) / Stephan, R. (Autor:in) / Wieczorek, K. (Autor:in)
MATERIALS SCIENCE AND ENGINEERING B -LAUSANNE- ; 114/115 ; 3-8
01.01.2004
6 pages
Aufsatz (Zeitschrift)
Englisch
DDC:
620.11
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