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Minimization of Drain-to-Gate Interaction in a SiC JFET Inverter Using an External Gate-Source Capacitor
Minimization of Drain-to-Gate Interaction in a SiC JFET Inverter Using an External Gate-Source Capacitor
Minimization of Drain-to-Gate Interaction in a SiC JFET Inverter Using an External Gate-Source Capacitor
Berry, O. (author) / Hamieh, Y. (author) / Rael, S. (author) / Meibody-Tabar, F. (author) / Vieillard, S. (author) / Bergogne, D. (author) / Morel, H. (author) / Bauer, A.J. / Friedrichs, P. / Krieger, M.
2010-01-01
4 pages
Article (Journal)
English
DDC:
620.11
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