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SEMICONDUCTOR MEMORY DEVICE
A semiconductor memory device includes an interlayer insulating layer, a plurality of first contact pads embedded in the interlayer insulating layer, a plurality of first work function adjustment patterns embedded in the interlayer insulating layer and disposed on the plurality of first contact pads, and a plurality of lower electrodes disposed on the plurality of first work function adjustment patterns.
SEMICONDUCTOR MEMORY DEVICE
A semiconductor memory device includes an interlayer insulating layer, a plurality of first contact pads embedded in the interlayer insulating layer, a plurality of first work function adjustment patterns embedded in the interlayer insulating layer and disposed on the plurality of first contact pads, and a plurality of lower electrodes disposed on the plurality of first work function adjustment patterns.
SEMICONDUCTOR MEMORY DEVICE
JEON INTAK (author) / LIM HANJIN (author) / JUNG HYUNGSUK (author)
2023-11-09
Patent
Electronic Resource
English
IPC:
H10B
SEMICONDUCTOR DEVICE, MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR MEMORY DEVICE
| European Patent Office | 2023