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Characterization of Pd-nanocrystal-based nonvolatile memory devices
Charge loss rate of Pd-nanocrystal (NC)-based nonvolatile memories is reduced about 60% by employing an asymmetric tunnel barrier composed of stacked SiO2 and HfO2 layers or insulating ZrO2 NCs between Pd NCs.
Characterization of Pd-nanocrystal-based nonvolatile memory devices
Charge loss rate of Pd-nanocrystal (NC)-based nonvolatile memories is reduced about 60% by employing an asymmetric tunnel barrier composed of stacked SiO2 and HfO2 layers or insulating ZrO2 NCs between Pd NCs.
Characterization of Pd-nanocrystal-based nonvolatile memory devices
Kwang Soo Seol, (author) / Seong Jae Choi, (author) / Jae-Young Choi, (author) / Eun-Joo Jang, (author) / Byung-Ki Kim, (author) / Sang-Jin Park, (author) / Dea-Gil Cha, (author) / Shinae Jun, (author) / Jong-Bong Park, (author) / Yoondong Park, (author)
2006-10-01
414732 byte
Conference paper
Electronic Resource
English
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