Eine Plattform für die Wissenschaft: Bauingenieurwesen, Architektur und Urbanistik
Deep levels reduction in (NH4)2S treated and annealed GaAs epilayer on Si substrate
Deep levels reduction in (NH4)2S treated and annealed GaAs epilayer on Si substrate
Deep levels reduction in (NH4)2S treated and annealed GaAs epilayer on Si substrate
Saravanan, S. (Autor:in) / Soga, T. (Autor:in) / Jimbo, T. (Autor:in) / Umeno, M. (Autor:in)
MATERIALS SCIENCE AND ENGINEERING -LAUSANNE- B ; 84 ; 195 - 199
01.01.2001
5 pages
Aufsatz (Zeitschrift)
Englisch
DDC:
620.11
© Metadata Copyright the British Library Board and other contributors. All rights reserved.
Deep levels in rapid thermal annealed GaAs
British Library Online Contents | 1994
|Deep levels in neutron-transmutation-doped and thermally annealed semi-insulating GaAs
British Library Online Contents | 1998
|Strain relaxation of InAs epilayer on GaAs under In-rich conditions
British Library Online Contents | 2003
|Impact of 4H-SiC Substrate Defectivity on Epilayer Injected Carrier Lifetimes
British Library Online Contents | 2009
|Thick Epilayer for Power Devices
British Library Online Contents | 2007
|