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Circuit Modeling of Vertical Buried-Grid SiC JFETs
Circuit Modeling of Vertical Buried-Grid SiC JFETs
Circuit Modeling of Vertical Buried-Grid SiC JFETs
Tolstoy, G. (Autor:in) / Peftitsis, D. (Autor:in) / Lim, J.K. (Autor:in) / Bakowski, M. (Autor:in) / Nee, H.P. (Autor:in) / Bauer, A.J. / Friedrichs, P. / Krieger, M. / Pensl, G. / Rupp, R.
01.01.2010
4 pages
Aufsatz (Zeitschrift)
Englisch
DDC:
620.11
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