Fachinformationsdienst BAUdigital

A platform for research: civil engineering, architecture and urbanism

    Electrical characterization of MFeOS gate stacks for ferroelectric FETs

    New search for: Kumar, A.
    New search for: Rao, A.
    New search for: Goswami, M.
    New search for: Singh, B. R.

    Access

    Access via TIB
    Check availability in my library
    Order at Subito €

    Access

    Access via TIB
    Check availability in my library
    Order at Subito €

    Page navigation

    Document information
    Similar titles

    Export, share and cite

    Electrical characterization of MFeOS gate stacks for ferroelectric FETs

    New search for: Kumar, A.
    New search for: Rao, A.
    New search for: Goswami, M.
    New search for: Singh, B. R.

    Access

    Access via TIB
    Check availability in my library
    Order at Subito €

    Electrical characterization of MFeOS gate stacks for ferroelectric FETs

    New search for: Kumar, A.
    New search for: Rao, A.
    New search for: Goswami, M.
    New search for: Singh, B. R.

    Access

    Access via TIB
    Check availability in my library
    Order at Subito €

    Access

    Access via TIB
    Check availability in my library
    Order at Subito €

    Page navigation

    Document information
    Similar titles

    Export, share and cite

    Document information
    Title:

    Electrical characterization of MFeOS gate stacks for ferroelectric FETs

    Contributors:

    Kumar, A. (author) / Rao, A. (author) / Goswami, M. (author) / Singh, B. R. (author)

    Published in:

    MATERIALS SCIENCE IN SEMICONDUCTOR PROCESSING ; 16 ; 1603-1607

    Publication date:

    2013-01-01

    Size:

    5 pages

    ISSN:

    1369-8001

    Type of media:

    Article (Journal)

    Type of material:

    Print

    Language:

    English

    Classification:

    DDC:  621.38152

    © Metadata Copyright the British Library Board and other contributors. All rights reserved.

    Similar titles

    Effects of Channel Orientations, High-? Gate Stacks and Stress on UTB-FETs: A QDD Simulation Study

    Silvestri, Luca / Reggiani, Susanna / Gnani, Elena et al. | IEEE | 2008

    Ferroelectric and Optoelectronic Coupling Effects in Layered Ferroelectric Semiconductor‐Based FETs for Visual Simulation

    Zhao, Can / Gao, Zhaotan / Hong, Zian et al. | Wiley | 2025

    Free access

    Electrical characterization and carrier transportation in Hf-silicate dielectrics using ALD gate stacks for 90nm node MOSFETs

    Chen, H. W. / Chen, S. Y. / Chen, K. C. et al. | British Library Online Contents | 2008

    Gate-controllable photoresponse of nitrogen-doped p-type ZnSe nanoribbons top-gate FETs

    Wu, Di / Shi, Zhifeng / Xu, Tingting et al. | British Library Online Contents | 2016

    Gate-controllable photoresponse of nitrogen-doped p-type ZnSe nanoribbons top-gate FETs

    Wu, Di / Shi, Zhifeng / Xu, Tingting et al. | British Library Online Contents | 2016

    Back to top