Eine Plattform für die Wissenschaft: Bauingenieurwesen, Architektur und Urbanistik
Calibration of Mobility and Interface Trap Parameters for High Temperature TCAD Simulation of 4H-SiC VDMOSFETs
Calibration of Mobility and Interface Trap Parameters for High Temperature TCAD Simulation of 4H-SiC VDMOSFETs
Calibration of Mobility and Interface Trap Parameters for High Temperature TCAD Simulation of 4H-SiC VDMOSFETs
Jaikumar, M.G. (Autor:in) / Karmalkar, S. (Autor:in)
MATERIALS SCIENCE FORUM ; 717/720 ; 1101-1104
01.01.2012
4 pages
Aufsatz (Zeitschrift)
Englisch
DDC:
620.11
© Metadata Copyright the British Library Board and other contributors. All rights reserved.
British Library Online Contents | 1997
|British Library Online Contents | 2003
|Defect behaviors in n-channel power VDMOSFETs during HEFS and thermal post-HEFS annealing
British Library Online Contents | 2006
|Trends, demands and challenges in TCAD
British Library Online Contents | 2005
|Interface Trap Density and Mobility Characterization of Silicon Carbide MOSFET Inversion Layers
British Library Online Contents | 2009
|