A platform for research: civil engineering, architecture and urbanism
Heavy Water in Gate Stack Processing
Heavy Water in Gate Stack Processing
Heavy Water in Gate Stack Processing
Pap, A.E. (author) / Ducso, C. (author) / Kamaras, K. (author) / Battistig, G. (author) / Barsony, I. (author) / Lerch, W. / Niess, J.
2008-01-01
14 pages
Article (Journal)
English
DDC:
620.11
© Metadata Copyright the British Library Board and other contributors. All rights reserved.
Gate stack technology for nanoscale devices
IEEE | 2006
|Gate stack technology for nanoscale devices
British Library Online Contents | 2006
|Issues in High-kappa Gate Stack Interfaces
British Library Online Contents | 2002
|Electrical properties of SiO2/TiO2 high-k gate dielectric stack
British Library Online Contents | 2006
|