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PIEZOELECTRIC ELEMENT, AND PIEZOELECTRIC ELEMENT APPLICATION DEVICE
To provide a piezoelectric element that can prevent the generation of cracks, and a piezoelectric element application device.SOLUTION: A piezoelectric element of the present invention comprises: a substrate including silicon; a first electrode formed on the substrate; a piezoelectric layer formed on the first electrode and including potassium, sodium, and niobium; and a second electrode formed on the piezoelectric layer. A first diffusion prevention layer including an insulating material is arranged between the substrate and the piezoelectric layer. The piezoelectric layer is formed continuously on a first area that is a surface of the first electrode, a second area that is a surface of the first diffusion prevention layer, and a third area that is a surface of the substrate, and the third area is arranged between the first area and the second area.SELECTED DRAWING: Figure 5
【課題】クラックの発生を抑制できる圧電素子、および圧電素子応用デバイスを提供する。【解決手段】本発明の圧電素子は、シリコンを含む基板と、基板上に形成された第1電極と、第1電極上に形成され、カリウムとナトリウムとニオブとを含む圧電体層と、圧電体層上に形成された第2電極と、を備えた圧電素子であって、基板と圧電体層との間には絶縁材料を含む第1拡散抑制層が配置され、圧電体層は、第1電極の表面である第1領域、第1拡散抑制層の表面である第2領域、および基板の表面である第3領域上に連続して形成され、第3領域は、第1領域と第2領域との間に配置される。【選択図】図5
PIEZOELECTRIC ELEMENT, AND PIEZOELECTRIC ELEMENT APPLICATION DEVICE
To provide a piezoelectric element that can prevent the generation of cracks, and a piezoelectric element application device.SOLUTION: A piezoelectric element of the present invention comprises: a substrate including silicon; a first electrode formed on the substrate; a piezoelectric layer formed on the first electrode and including potassium, sodium, and niobium; and a second electrode formed on the piezoelectric layer. A first diffusion prevention layer including an insulating material is arranged between the substrate and the piezoelectric layer. The piezoelectric layer is formed continuously on a first area that is a surface of the first electrode, a second area that is a surface of the first diffusion prevention layer, and a third area that is a surface of the substrate, and the third area is arranged between the first area and the second area.SELECTED DRAWING: Figure 5
【課題】クラックの発生を抑制できる圧電素子、および圧電素子応用デバイスを提供する。【解決手段】本発明の圧電素子は、シリコンを含む基板と、基板上に形成された第1電極と、第1電極上に形成され、カリウムとナトリウムとニオブとを含む圧電体層と、圧電体層上に形成された第2電極と、を備えた圧電素子であって、基板と圧電体層との間には絶縁材料を含む第1拡散抑制層が配置され、圧電体層は、第1電極の表面である第1領域、第1拡散抑制層の表面である第2領域、および基板の表面である第3領域上に連続して形成され、第3領域は、第1領域と第2領域との間に配置される。【選択図】図5
PIEZOELECTRIC ELEMENT, AND PIEZOELECTRIC ELEMENT APPLICATION DEVICE
圧電素子、および圧電素子応用デバイス
ITAYAMA YASUHIRO (author) / HORIBA YASUHISA (author) / TAKEUCHI MASAHIRO (author)
2023-10-13
Patent
Electronic Resource
Japanese
PIEZOELECTRIC ELEMENT, AND PIEZOELECTRIC ELEMENT APPLICATION DEVICE
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